[PATCH v2] riscv: Add macros for FPUCW/fcsr in fpu_control.h

Shiqi Zhang shiqi@isrc.iscas.ac.cn
Sun Feb 12 06:52:15 GMT 2023


Add macros for rounding modes and accrued exception flags in order to
make controlling fcsr easier for users.

Reference: RISC-V Unprivileged Spec v20191213, Section 11.2: Figure 11.2, Table 11.1 & 11.2
---
Fixed careless mistakes in v1 and removed invalid rounding mode DYN.

Still, I think these macros should be documented somewhere but I'm
not sure where should I doc them. I'll appreciate it if you could give
some suggestions.

Regards,
Shiqi Zhang

 sysdeps/riscv/fpu_control.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/sysdeps/riscv/fpu_control.h b/sysdeps/riscv/fpu_control.h
index c33798c6bb..1dcadd3ea1 100644
--- a/sysdeps/riscv/fpu_control.h
+++ b/sysdeps/riscv/fpu_control.h
@@ -36,6 +36,20 @@ extern fpu_control_t __fpu_control;
 # define _FPU_DEFAULT  0
 # define _FPU_IEEE     _FPU_DEFAULT
 
+/* FPU rounding modes */
+# define _FPU_RM_RNE (0 << 5)
+# define _FPU_RM_RTZ (1 << 5)
+# define _FPU_RM_RDN (2 << 5)
+# define _FPU_RM_RUP (3 << 5)
+# define _FPU_RM_RMM (4 << 5)
+
+/* FPU accrued exception flags */
+# define _FPU_EXCEPT_NV (1 << 4)
+# define _FPU_EXCEPT_DZ (1 << 3)
+# define _FPU_EXCEPT_OF (1 << 2)
+# define _FPU_EXCEPT_UF (1 << 1)
+# define _FPU_EXCEPT_NX (1 << 0)
+
 /* Type of the control word.  */
 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
 
-- 
2.39.1



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