[patch/idea] Add register scrambling to testsuite
Siddhesh Poyarekar
siddhesh@gotplt.org
Mon Jun 13 07:42:25 GMT 2022
On 11/06/2022 09:22, DJ Delorie via Libc-alpha wrote:
>
> [Note: I tried to add a special case for the bug noted below, but ran
> out of time while trying to learn enough ppc64/vsx opcodery]
>
> Allow for target-specific register "scrambling" - loading arbitrary
> values into all registers that need not be call-saved. These values
> should be non-zero and invalid addresses, to help catch inadvertent
> uses of otherwise uninitialized registers.
>
> Intended to help prevent bugs such as those fixed by
> 0218463dd8265ed937622f88ac68c7d984fe0cfc
+1 to the idea, although as Jeff pointed out, PLT boundaries may be a
more effective place, otherwise it relies on dummy values surviving
multiple calls. If that's the route we take, we may also want to
measure the execution time overhead on the testsuite and if it's too
high, put this behind a build option, e.g. make SCRAMBLE_REGS=1 check.
Also I wonder if in the longer term (i.e. when glibc can be built with
some sanitizers enabled) this would be better suited as a
compiler/sanitizer flag that clobbers regs at function entry instead of
glibc trying to do the interception. ISTM that may have broader impact
than simply catching the ppc64le oddball case. The performance impact
may be insane though...
Sid
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