[PATCH 1/3] powerpc64: Replace some PPC_FEATURE_HAS_VSX with PPC_FEATURE_ARCH_2_06

[Adhemerval Zanella]

On 08/07/2021 19:29, Tulio Magno Quites Machado Filho via Libc-alpha wrote:
> Anton Blanchard via Libc-alpha <libc-alpha@sourceware.org> writes:
> 
>> We use PPC_FEATURE_HAS_VSX to select a number of POWER7 optimised
>> functions. These functions don't use any VSX instructions, so
>> PPC_FEATURE_ARCH_2_06 seems like a better fit.
> 
> I don't think we can replace PPC_FEATURE_HAS_VSX with PPC_FEATURE_ARCH_2_06
> because it would cause issues similar to the ones fixed in patch 3/3, i.e.
> this function would run on a processor that implements the Power ISA 2.06
> but does not implement Altivec.
> 
> So, if testing for PPC_FEATURE_ARCH_2_06 is important, I think it has to test
> for:
> 
>     (hwcap & PPC_FEATURE_ARCH_2_06 && hwcap & PPC_FEATURE_HAS_ALTIVEC)
> 
> However, VSX was introduced by Power ISA 2.06. So, PPC_FEATURE_HAS_VSX
> implies PPC_FEATURE_ARCH_2_06.  PPC_FEATURE_HAS_VSX also implies
> PPC_FEATURE_HAS_ALTIVEC.
> The change would only make a difference if a processor implements both Power
> ISA 2.06 and Altivec, but does not implement VSX.
> 
> Am I missing anything?

My understanding is the selection change done for this patch is to enable 
routines that do *not* use vectorized instructions (either VSX or altivec)
on a CPU that does have isa 2.06 (to use cmpb for instance).  That's why
I suggested that we should in fact rename them and also maybe move to
a different folder than 'power7' to something more meaningful (for instance
__memchr_isa206 or something).

The selection change above you suggested is not strictly required, it
would be for memcpy/memmove (if I recall correctly they only use altivec).

> 
> Another important point is to keep the tests in the IFUNC resolvers in sync
> with sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
> Otherwise, glibc tests and benchtests may not execute correctly.
>