[PATCH v2 3/3] powerpc64le: Add glibc-hwcaps support

[Tulio Magno Quites Machado Filho]

Florian Weimer via Libc-alpha <libc-alpha@sourceware.org> writes:

> The "power10" and "power9" subdirectories are selected.

Tested on power10.

Should this patch also include modification to
glibc-hwcaps-first-subdirs-for-tests ?

Is it intentional that other architectures end up with the following file?

    elf/glibc-hwcaps/x86-64-v2/markermod1.so

> diff --git a/sysdeps/powerpc/powerpc64/le/dl-hwcaps-subdirs.c b/sysdeps/powerpc/powerpc64/le/dl-hwcaps-subdirs.c
> new file mode 100644
> index 0000000000..1fa3735a8c
> --- /dev/null
> +++ b/sysdeps/powerpc/powerpc64/le/dl-hwcaps-subdirs.c
> @@ -0,0 +1,39 @@
>...
> +
> +uint32_t
> +_dl_hwcaps_subdirs_active (void)
> +{
> +  int active = 0;
> +
> +  if ((GLRO (dl_hwcap2) & PPC_FEATURE2_ARCH_3_00) == 0)
> +    return _dl_hwcaps_subdirs_build_bitmask (subdirs_count, active);
> +  ++active;
> +
> +  if ((GLRO (dl_hwcap2) & PPC_FEATURE2_ARCH_3_1) == 0)
> +    return _dl_hwcaps_subdirs_build_bitmask (subdirs_count, active);

This is the tricky part.  I like your proposal to match with the behavior
of -mcpu.
In that case we would have:

  power9:
    ((GLRO (dl_hwcap2) & PPC_FEATURE2_ARCH_3_00) == 0
     || (GLRO (dl_hwcap2) & PPC_FEATURE2_HAS_IEEE128) == 0
     || (GLRO (dl_hwcap) & PPC_FEATURE_HAS_ALTIVEC) == 0
     || (GLRO (dl_hwcap) & PPC_FEATURE_HAS_VSX) == 0)

  power10:
    /* power10 also requires altivec, vsx and ieee128 availability, but these
       features have already been tested.  */
    ((GLRO (dl_hwcap2) & (PPC_FEATURE2_ARCH_3_1 | PPC_FEATURE2_MMA)) == 0)

This would mean that a processor that implements POWER ISA 3.0, but does not
implement altivec, would not be able to benefit from that particular library
build, falling back to the general build (power8), e.g. microwatt would fall
in this category right now.

>   * The names "power9" and "power10" may be too implementation-specific in
>     the future.

I do agree, but I don't have a better suggestion.
It's hard to be future-proof here.
I don't think that using the POWER ISA level would help much though,
because new processors may decide to not implement a particular feature
in the future that we believe is essential right now.

-- 
Tulio Magno