[PATCH v3 7/8] aarch64: Add sysv specific enabling code for memory tagging

[Siddhesh Poyarekar]

On 11/25/20 9:36 PM, Richard Earnshaw wrote:
> Well, I could rewrite (0xfffe << PR_MTE_TAG_SHIFT) as
> 
>    (PR_MTE_TAG_MASK & ~(1UL << PR_MTE_TAG_SHIFT))
> 
> but I'm not entirely convinced that's a lot more understandable: it's
> just a bit-mask of tags that can be enabled.

It isn't, I think what would work is a single macro that describes what 
(PR_MTE_TAG_MASK & ~(1UL << PR_MTE_TAG_SHIFT)) is, e.g.  DISALLOW_TAG_0 
assuming that that's the intention since I can't tell what it's for at 
the moment.

> I don't know how stable this features structure has to be.  If it has to
> remain fixed in layout forever (append-only?), then I think I'd rather
> keep it as an unsigned to allow for more uses of the tunable as the need
> arises.  If it's acceptable to just change the layout aribitrarily
> between glibc releases, then using a byte for now would be fine.

It's an internal structure, so we could do whatever we want with it.

Siddhesh