RISC-V / GCC 10: invalid operation not set in acos and asin

[Joseph Myers]

On Wed, 13 May 2020, Aurelien Jarno wrote:

> I have tracked the issue to the following piece of code from
> sysdeps/ieee754/dbl-64/e_asin.c:
> 
> |   else {
> |     u.i[HIGH_HALF]=0x7ff00000;
> |     v.i[HIGH_HALF]=0x7ff00000;
> |     u.i[LOW_HALF]=0;
> |     v.i[LOW_HALF]=0;
> |     return u.x/v.x;
> |   }
> 
> GCC 10 optimizes out that code and loads a NaN value from memory instead
> of doing the division, which explains why the invalid operation
> exception is not set.

So that should be filed as a regression bug in GCC.  If fixed quickly we 
can then put something on the per-release wiki pages about the fix for GCC 
bug N (bug present in 10.1, fixed in 10.2) being needed to avoid those 
failures.

-- 
Joseph S. Myers
joseph@codesourcery.com