[PATCH 3/3] mips: remove useless register spill

[Maciej W. Rozycki]

Hi Huang Pei,

 Apologies for my late reply, I've had a hectic time recently and some GCC 
stuff had to take priority due to the end of Stage 1 there.

> I must admit that I did not realize that Patch 3  would cause compatibiliy
> issue, that is Linux/MIPS kernel before 2.6.36 depended on
> "move a0, s0 ' just preceding "syscall" to make SYSCALL Restart
> work, while  Linux/MIPS after 2.6.36 do not

 Or `move v0, s0' (in this case) to be correct.

 Yes, this has been quite obscure and used to be hardly documented up to 
the point that breakage happened while the old scheme was still supported.  
And given that syscall restarts are not at all that frequent any symptom 
would be limited to an occasional program crash or other odd behaviour as 
the wrong syscall was dispatched upon a restart.

 This is why I added the explanation along with fixes for BZ #15054 made 
with commit b82ba2f011fc ("MIPS: Respect the legacy syscall restart 
convention.").  Before that we only had Linux sources as a reference.

 NB the old scheme was removed from Linux with commit 8f5a00eb422e ("MIPS: 
Sanitize restart logics").

> since glibc 2.24，the minimum kernel version is 3.2, is it ok to add Patch
> 3 for glibc after version 2.24? If so, I would send V3, which merge Patch
> 2 and Patch 3 and rewrite the change description with minimium kernel
> version requirement.

 As I noted elsewhere I object such a change if made on its own, as it 
would only cause a mess.

 You can review my commit referred above, and also commit 43301bd3c281 
("Add support for building as MIPS16 code.") to see what has to be done to 
remove bits for the old feature in a consistent manner.

  Maciej