[PATCH 11/11] powerpc64le: Add glibc-hwcaps support

[Carlos Seo]

'darn' requires firmware support, so that's why it has a hwcap2 bit
separate from ISA 3.0 (see commit a4700a26 in the kernel tree). Although I
personally have not seen any firmware that disables that on POWER9, it is
safer to assume that ISA 3.0 does not imply that 'darn' is available.

On Wed, 2 Dec 2020 at 11:31, Florian Weimer via Libc-alpha <
libc-alpha@sourceware.org> wrote:

> * Adhemerval Zanella:
>
> > On 02/12/2020 10:51, Florian Weimer wrote:
> >> * Adhemerval Zanella:
> >>
> >>>> +uint32_t
> >>>> +_dl_hwcaps_subdirs_active (void)
> >>>> +{
> >>>> +  int active = 0;
> >>>> +
> >>>> +  /* Test in reverse preference order.  Altivec and VSX are implied
> by
> >>>> +     the powerpc64le ABI definition.  */
> >>>> +
> >>>> +  /* POWER9.  GCC enables float128 hardware support for
> -mcpu=power9.  */
> >>>> +  if ((GLRO (dl_hwcap2) & PPC_FEATURE2_ARCH_3_00) == 0
> >>>> +      || (GLRO (dl_hwcap2) & PPC_FEATURE2_HAS_IEEE128) == 0)
> >>>> +    return _dl_hwcaps_subdirs_build_bitmask (subdirs_count, active);
> >>>> +  ++active;
> >>>
> >>> Should we test PPC_FEATURE2_DARN as well? I think cryptographic and
> related
> >>> libraries might use it as source of entropy.
> >>
> >> It does not show up in the compiler preprocessor macros.  There also
> >> have been cases where randomness-generating instructions have been
> >> disabled in firmware (but probably not on POWER).  I think it's safer
> >> not to include cryptographic stuff.
> >
> > GCC does provides it through a compiler builtin, only enabled for
> > power9 and newer.  And I think hardware entropy instruction are not
> > used on cryptographic, but also on different fields as simulations.
>
> Maybe Tulio can comment.  I do not have a strong opinion (although the
> x86 precedent is kind of unsettling).
>
> Thanks,
> Florian
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