[PATCH v2 1/3] x86: Add CPU Vendor ID detection support for Zhaoxin processors
H.J. Lu
hjl.tools@gmail.com
Tue Apr 7 12:37:40 GMT 2020
On Sun, Mar 29, 2020 at 10:34 PM MayShao <MayShao@zhaoxin.com> wrote:
>
> To recognize Zhaoxin CPU Vendor ID, add a new architecture type
> arch_kind_zhaoxin for Vendor Zhaoxin detection.
>
> ---
> sysdeps/x86/cpu-features.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++
> sysdeps/x86/cpu-features.h | 1 +
> 2 files changed, 59 insertions(+)
>
> diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
> index 81a170a..4d60553 100644
> --- a/sysdeps/x86/cpu-features.c
> +++ b/sysdeps/x86/cpu-features.c
> @@ -466,6 +466,64 @@ init_cpu_features (struct cpu_features *cpu_features)
> }
> }
> }
> + /* This spells out "CentaurHauls" or " Shanghai ". */
> + else if ((ebx == 0x746e6543 && ecx == 0x736c7561 && edx == 0x48727561)
> + || (ebx == 0x68532020 && ecx == 0x20206961 && edx == 0x68676e61))
> + {
> + unsigned int extended_model, stepping;
> +
> + kind = arch_kind_zhaoxin;
> +
> + get_common_indices (cpu_features, &family, &model, &extended_model,
> + &stepping);
> +
> + get_extended_indices (cpu_features);
> +
> +
Single blank line.
> + if (family == 0x6)
> + {
> + model += extended_model;
Move it out of if block.
> + if (model == 0xf || model == 0x19)
> + {
> + cpu_features->feature[index_arch_AVX_Usable]
> + &= (~bit_arch_AVX_Usable
> + & ~bit_arch_AVX2_Usable);
> +
> + cpu_features->feature[index_arch_Slow_SSE4_2]
> + |= (bit_arch_Slow_SSE4_2);
> +
> + cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
> + &= ~bit_arch_AVX_Fast_Unaligned_Load;
> + }
> + }
> +
> + if (family == 0x7)
else if
> + {
> + model += extended_model;
Remove it.
> + if (model == 0x1b)
> + {
> + cpu_features->feature[index_arch_AVX_Usable]
> + &= (~bit_arch_AVX_Usable
> + & ~bit_arch_AVX2_Usable);
> +
> + cpu_features->feature[index_arch_Slow_SSE4_2]
> + |= bit_arch_Slow_SSE4_2;
> +
> + cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
> + &= ~bit_arch_AVX_Fast_Unaligned_Load;
> + }
> +
> + if (model == 0x3b)
else if
> + {
> + cpu_features->feature[index_arch_AVX_Usable]
> + &= (~bit_arch_AVX_Usable
> + & ~bit_arch_AVX2_Usable);
> +
> + cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
> + &= ~bit_arch_AVX_Fast_Unaligned_Load;
> + }
> + }
> + }
> else
> {
> kind = arch_kind_other;
> diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
> index aea83e6..f05d5ce 100644
> --- a/sysdeps/x86/cpu-features.h
> +++ b/sysdeps/x86/cpu-features.h
> @@ -53,6 +53,7 @@ enum cpu_features_kind
> arch_kind_unknown = 0,
> arch_kind_intel,
> arch_kind_amd,
> + arch_kind_zhaoxin,
> arch_kind_other
> };
>
> --
> 2.7.4
>
>
--
H.J.
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