[PATCH v2 6/6] [powerpc] Rename fegetenv_status to fegetenv_control
Paul E Murphy
murphyp@linux.ibm.com
Mon Sep 23 16:21:00 GMT 2019
On 9/19/19 1:46 PM, Paul A. Clarke wrote:
> From: "Paul A. Clarke" <pc@us.ibm.com>
>
> fegetenv_status is used variously to retrieve the FPSCR exception enable
> bits, rounding mode bits, or both. These are referred to as the control
> bits in the POWER ISA. FPSCR status bits are also returned by the
> 'mffs' and 'mffsl' instructions, but they are uniformly ignored by all
> uses of fegetenv_status. Change the name to be reflective of its
> current and expected use.
>
> 2019-09-19 Paul A. Clarke <pc@us.ibm.com>
>
> * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_status): Rename to
> fegetenv_control.
> * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Accommodate
> rename of fegetenv_status to fegetenv_control.
> * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Likewise.
> * sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Likewise.
> * sysdeps/powerpc/fpu/fegetmode.c (fegetmode): Likewise.
> * sysdeps/powerpc/fpu/fesetenv.c (__fesetenv): Likewise.
> * sysdeps/powerpc/fpu/fesetmode.c (fesetmode): Likewise.
> ---
> v2: This is a new patch in the series.
OK.
Reviewed-By: Paul E Murphy <murphyp@linux.ibm.com>
> diff --git a/sysdeps/powerpc/fpu/fegetmode.c b/sysdeps/powerpc/fpu/fegetmode.c
> index 0e0a01c..65c5ebe 100644
> --- a/sysdeps/powerpc/fpu/fegetmode.c
> +++ b/sysdeps/powerpc/fpu/fegetmode.c
> @@ -21,6 +21,6 @@
> int
> fegetmode (femode_t *modep)
> {
> - *modep = fegetenv_status ();
> + *modep = fegetenv_control ();
> return 0;
> }
Slightly off-topic, is fegetmode documented?
More information about the Libc-alpha
mailing list