[PATCH] x86-64: Compile branred.c with -mprefer-vector-width=128

[Florian Weimer]

* H. J. Lu:

> -O3 with AVX vectorizes some loops in sysdeps/ieee754/dbl-64/branred.c
> with 256-bit vector instructions, which leads to store forward stall:
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90579
>
> There is no easy fix in compiler.  This patch limits vector width to
> 128 bits to work around this issue.  It improves performance of sin
> and cos by more than 40% on Skylake compiled with -O3 -march=skylake.
>
> OK for master branch?
>
> * sysdeps/x86_64/fpu/Makefile (CFLAGS-branred.c): New.  Set
> to -mprefer-vector-width=128.

This is bug 24603, right?

Let's hope that the reproducer in the test case is misleadingly reduced,
and we can fix the actual issue in the compiler.  I updated the GCC PR.

Thanks,
Florian