[PATCH 1/3] x86: Add CPU Vendor ID detection support for Zhaoxin processors

[Florian Weimer]

* MayShao:

> +                 cpu_features->feature[index_arch_Slow_SSE4_2]
> +                   |= (bit_arch_Slow_SSE4_2
> +                   | bit_arch_Prefer_MAP_32BIT_EXEC);

Is the Prefer_MAP_32BIT_EXEC part really correct?

As discussed recently, it does not have an effect with programs linked
with -z separate-code (the default these days, I think) and PIE.

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Would you please clarify if this is intended as a patch submission?