[PATCH 3/3] aarch64: Optimized memchr specific to AmpereComputing skylark

Adhemerval Zanella adhemerval.zanella@linaro.org
Mon Oct 15 11:54:00 GMT 2018


If we don't have a test for it, please add one along with patch submission.

On 15/10/2018 00:20, Xue Feng wrote:
> Yes, I missed one situation. If the next block is just the start of a new page with no access, this load will cause a segfault.
> 
> Thanks,
> Feng
> 
> ________________________________________
> From: Richard Henderson <rth7680@gmail.com> on behalf of Richard Henderson <rth@twiddle.net>
> Sent: Saturday, October 13, 2018 0:18
> To: Xue Feng; libc-alpha@sourceware.org
> Cc: marcus.shawcroft@linaro.org; szabolcs.nagy@arm.com; Feng Xue
> Subject: Re: [PATCH 3/3] aarch64: Optimized memchr specific to AmpereComputing skylark
> 
> On 10/12/18 4:44 AM, Xue Feng wrote:
> > +L(loop):
> > +     /*
> > +      * Preload the next 16-byte aligned block to hide some memory
> > +      * access latency.
> > +      */
> > +     ldp     data1, data2, [src, 16]!
> 
> You seem to be under the mistaken impression that you are allowed to search all
> cntin bytes.  However, memchr "shall behave as if it reads the characters
> sequentially and stops as soon as a matching character is found."
> 
> 
> r~
> </rth@twiddle.net></rth7680@gmail.com>
> 



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