riscv: fmax/fmin sNaN fix

Szabolcs Nagy szabolcs.nagy@arm.com
Tue Feb 20 11:29:00 GMT 2018


On 20/02/18 02:57, DJ Delorie wrote:
> 
> RISC-V's FPU follows the IEEE spec, not the POSIX spec.  This patch
                            ^^^^^^^^^
which one?
(the next ieee revision will have different min/max operations)



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