[PATCH] powerpc: Use aligned stores in memset

[Steven Munroe]

On Tue, 2017-09-12 at 21:45 +0200, Florian Weimer wrote:
> On 09/12/2017 09:21 PM, Steven Munroe wrote:
> > On Tue, 2017-09-12 at 19:04 +0200, Florian Weimer wrote:
> >> On 09/12/2017 04:16 PM, Steven Munroe wrote:
> >>> On Tue, 2017-09-12 at 16:08 +0200, Florian Weimer wrote:
> >>>> * Steven Munroe:
> >>>>
> >>>>>> This means that GCC introduced an unaligned store, no matter how memset
> >>>>>> was implemented.
> >>>>>>
> >>>>> C will do what ever the programmer wants. We can not stop that.
> >>>>
> >>>> That's not true.  If some specification says that for POWER, mem* must
> >>>> behave in a certain way, and the GCC/glibc combiniation does not do
> >>>> that, that's a bug on POWER.
> >>>>
> >>> What is the bug that you think we are not fixing?
> >>
> >> memset, as called by the C programmer, still uses unaligned stores.
> 
> Please look at my example and its disassembly.
> 
> > We are not going to version every loop that might contain stores based
> > on speculation that someone who does not know what they are doing might
> > access Cache Inhibited storage.
> 
> You need to remove optimizations from GCC which expand memset calls
> using other instructions if those expansions do not compensate for the
> possibility of unaligned stores.
> 
No, the programmer should use -fno-builtin-memset if that programmer
knows he is accessing cache inhibited space.

To be clear this is not new, cache coherent and cache inhibited storage
have been in the PowerISA from the beginning.

So why all the fuss now?