[PATCH] powerpc: Use aligned stores in memset

Steven Munroe munroesj@linux.vnet.ibm.com
Tue Sep 12 14:16:00 GMT 2017


On Tue, 2017-09-12 at 16:08 +0200, Florian Weimer wrote:
> * Steven Munroe:
> 
> >> This means that GCC introduced an unaligned store, no matter how memset
> >> was implemented.
> >> 
> > C will do what ever the programmer wants. We can not stop that.
> 
> That's not true.  If some specification says that for POWER, mem* must
> behave in a certain way, and the GCC/glibc combiniation does not do
> that, that's a bug on POWER.
> 
What is the bug that you think we are not fixing?

> The programmer only sees the entire toolchain, and it is our job to
> make the whole thing compliant with applicable specifications, even if
> this means coordinating among different projects.
> 
> > And in user mode and cache coherent memory this is not a problem as
> > Adhemerval explained.
> 
> Obviously not, otherwise we wouldn't be changing glibc.
> 
I was arguing against forcing GCC and compilers in general being forced
to be aware of Cache Inhibited memory. Programmers do.

What are you arguing? 

> > So we are not going to degrade the performance of general applications
> > for a tiny subset of specialized device drivers. Those guy have to know
> > what they are doing.
> >
> > But in the library (like libc) that might be called from a user mode
> > device driver (Xorg for example) and access Cache inhibited memory the
> > memcpy implementation has to check alignment and size and using the
> > correct instructions for each case.
> >
> > That is what we are doing here.
> 
> Sorry, but you are contradicting yourself.  I very much doubt the
> Xorg-compatible memcmp is an improvement across the board.
> 




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