Synchronizing auxiliary mutex data

[Alexander Monakov]

On Wed, 21 Jun 2017, Andreas Schwab wrote:

> On Jun 21 2017, Alexander Monakov <amonakov@ispras.ru> wrote:
> 
> > Inside LLL_MUTEX_LOCK there's an atomic operation with acquire memory ordering.
> > The compiler and the hardware are responsible, together, for ensuring proper
> > ordering: the compiler may not move the load of __owner up prior to that atomic
> > operation, and must emit machine code that will cause the CPU to keep the
> > ordering at runtime (on some architectures, e.g. ARM, this implies emitting memory
> > barrier instructions, but on x86 the atomic operation will be a lock-prefixed
> > memory operation, enforcing proper ordering on its own).
> 
> Does that mean that an atomic operation flushes the cpu caches?

No, not at all: it only means that the CPU doesn't reorder the operations (so
the cache subsystem receives the requests in the same order they were in the
original program), and the cache subsystem serves them in that same order.

Alexander