[PATCH 1/3] Guess L1 cache linesize for aarch64

[Andrew Pinski]

On Thu, Jun 8, 2017 at 10:51 PM, Siddhesh Poyarekar <siddhesh@gotplt.org> wrote:
> On Friday 09 June 2017 04:27 AM, Richard Henderson wrote:
>> Using the cache hierarchy linesize minimum in CTR_EL0.
>> See the comment within the code for rationale.
>>
>>       * sysdeps/unix/sysv/linux/aarch64/sysconf.c: New file.
>>
>
> Looks good to me.

And me too.

Thanks,
ANdrew

>
> Thanks,
> Siddhesh