[PATCH] x86-64: Put L(SP_INF_0) in .rodata.cst4 section [BZ #21955]

[H.J. Lu]

sysdeps/x86_64/fpu/e_expf.S has

        /* Here if |x| is Inf */
        lea     L(SP_INF_0)(%rip), %rdx /* depending on sign of x: */
        movss   (%rdx,%rax,4), %xmm0    /* return zero or Inf */
        ret
...
         .section .rodata.cst8,"aM",@progbits,8
...
        .p2align 2
L(SP_INF_0):
        .long   0x7f800000      /* single precision Inf */
        .long   0               /* single precision zero */
        .type L(SP_INF_0), @object
        ASM_SIZE_DIRECTIVE(L(SP_INF_0))

Since L(SP_INF_0) is accessed as an array of 4-byte elements, it should
be placed in

	.section .rodata.cst4,"aM",@progbits,4

Tested on x86-64.  Any comments?

H.J.
---
	[BZ #21955]
	* sysdeps/x86_64/fpu/e_expf.S (L(SP_INF_0)): Place it in
	.rodata.cst4 section.
---
 sysdeps/x86_64/fpu/e_expf.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sysdeps/x86_64/fpu/e_expf.S b/sysdeps/x86_64/fpu/e_expf.S
index 4fd2bb1fb5..0d84e31615 100644
--- a/sysdeps/x86_64/fpu/e_expf.S
+++ b/sysdeps/x86_64/fpu/e_expf.S
@@ -304,6 +304,7 @@ L(SP_RANGE): /* single precision overflow/underflow bounds */
 	.type L(SP_RANGE), @object
 	ASM_SIZE_DIRECTIVE(L(SP_RANGE))
 
+	.section .rodata.cst4,"aM",@progbits,4
 	.p2align 2
 L(SP_INF_0):
 	.long	0x7f800000	/* single precision Inf */
@@ -311,7 +312,6 @@ L(SP_INF_0):
 	.type L(SP_INF_0), @object
 	ASM_SIZE_DIRECTIVE(L(SP_INF_0))
 
-	.section .rodata.cst4,"aM",@progbits,4
 	.p2align 2
 L(SP_RS): /* single precision 2^23+2^22 */
 	.long	0x4b400000
-- 
2.13.5