[PATCH 2/2] Enable ILP32 mode on aarch64

[Richard Henderson]

On 11/29/2016 10:51 AM, Steve Ellcey wrote:
> +#define TLS_IE(x)					\
> +  ({ register unsigned long __result asm ("x0");	\
> +     register unsigned long __t;			\
> +     asm ("mrs	%1, tpidr_el0; "			\
> +	  "adrp	%0, :gottprel:" #x "; "			\
> +	  "ldr	w0, [%0, #:gottprel_lo12:" #x "]; "	\
> +	  "add	%0, %0, %1"				\
> +	  : "=r" (__result), "=r" (__t));		\
> +     (int *) (__result); })
> +#endif

Why are you forcing x0 for __result?  You can use %w0 for the ldr destination 
instead.  (I actually didn't see the asm register specification at first and 
thought this was a bug.)


r~