arm, hppa, m68k, sh, nios maintainers: Please check your emulation of atomic operations

[Torvald Riegel]

These architectures seem to all use various sorts of emulation for
compare-and-exchange operations (CAS).  If these emulations do not stop
the world during a CAS, or do something else that prevents concurrent
write operations to the same memory location as the CAS, then atomic
store operations in glibc need to use a CAS to perform stores.
Otherwise, concurrent stores can happen between the load(s) and the
store that the CAS consists of.

If your architecture is affected by this, then it may be possible that
glibc's current concurrent code does not work correctly; this is because
we may still have plain stores in places where atomic stores should be
used.  Once we have completed the conversion to C11 atomics, all
concurrent stores will go through atomic_store_*().
See Chris Metcalf's patch for tilepro:
https://sourceware.org/ml/libc-alpha/2016-11/msg00414.html

If your architecture is not affected, I suggest adding a comment why
that is not the case.