[PATCHv2] powerpc: Add optimized P8 strspn

Segher Boessenkool segher@kernel.crashing.org
Mon Apr 4 16:42:00 GMT 2016


On Mon, Apr 04, 2016 at 09:48:46AM -0500, Paul E. Murphy wrote:
> >> +	lvsr	v11, r0, r3
> > 
> > That is 0, not r0.
> > 
> >> +	lvx	v0, r0, r3	/* Note, unaligned load ignores lower bits.  */
> > 
> > Same for lvx.
> 
> I'd intentionally used r0 in those cases to explicitly exploit its special
> meaning under those instructions. It it customary to explicitly use 0 in
> such cases?

Yes; the ISA document has many examples of this, see for example 6.4.1
in the Power ISA 3.0 doc.

Using "r0" here is quite misleading.


Segher



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