[PATCH] S/390: HW accelerated iconv module for iso-8859-1/cp37 conversions
Florian Weimer
fweimer@redhat.com
Tue Oct 13 12:20:00 GMT 2015
On 10/13/2015 02:17 PM, Andreas Krebbel wrote:
> On 10/13/2015 02:07 PM, Florian Weimer wrote:
>> On 10/13/2015 01:50 PM, Andreas Krebbel wrote:
>>> On 10/13/2015 12:40 PM, Andreas Schwab wrote:
>>>> "Andreas Krebbel" <krebbel@linux.vnet.ibm.com> writes:
>>>>
>>>>> + asm volatile ("0: \n\t" \
>>>>> + " troo %0,%1 \n\t" \
>>>>> + " jz 1f \n\t" \
>>>>> + " jo 0b \n\t" \
>>>>> + " llgc %3,0(%1) \n\t" \
>>>>> + " la %3,0(%3,%4) \n\t" \
>>>>> + " mvc 0(1,%0),0(%3) \n\t" \
>>>>> + " aghi %1,1 \n\t" \
>>>>> + " aghi %0,1 \n\t" \
>>>>> + " aghi %2,-1 \n\t" \
>>>>> + " j 0b \n\t" \
>>>>> + "1: \n" \
>>>>> + \
>>>>> + : "+a" (pOutput), "+a" (pInput), "+d" (length), "=&a" (tmp) \
>>>>
>>>> That doesn't force %1 to be an even numbered register.
>>>>
>>>> ../iconv/loop.c: Assembler messages:
>>>> ../iconv/loop.c:326: Fatal error: odd numbered general purpose register specified as register pair
>>>
>>> Only %0 is required to be a register pair. This is enforced with the register asm definition above:
>>>
>>> register unsigned char *pOutput asm ("2") = outptr;
>>>
>>> So it looks like GCC is not respecting the register asm in your case?!
>>
>> GCC can make a copy of the register variable before passing it to the
>> asm statement. The “+” in the constraint probably encourages that.
>
> No. GCC guarantees that it will use the register specified with register __asm__ as operand for
> inline assemblies. Please see: https://gcc.gnu.org/onlinedocs/gcc/Local-Reg-Vars.html#Local-Reg-Vars
>
> "... However, using the variable as an input or output operand to the asm guarantees that the
> specified register is used for that operand. See Extended Asm, for more information. ..."
Interesting. I still suspect that somehow “+” breaks this guarantee.
Andreas, can you provide the .S file from your GCC version (and perhaps
RTL dumps)?
Florian
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