[PATCH][BZ 18572][ARM] Fix lazy TLSDESC race on arm

Szabolcs Nagy szabolcs.nagy@arm.com
Thu Nov 12 11:31:00 GMT 2015


Lazily initialized TLS descriptors have a race on ARM, so
concurrent TLS access can cause crashes with -mtls-dialect=gnu2.

See the fix and description for AArch64:
https://sourceware.org/ml/libc-alpha/2015-06/msg00496.html

Differences compared to AArch64:

- Various versions of ARM have different synchronization methods,
   defined a DMB() macro that selects the right memory barrier at
   compile-time (since compiler builtins are not available in asm
   and it seems glibc does not do runtime dispatch).

- tls descriptor is (arg,f) on arm instead of (f,arg), this makes
   the "load f again with acquire mo" solution of AArch64 less
   attractive. (LDA on AArch32 only works with 0 offset and with
   an extra ADD the armv8 case would need more special casing with
   questionable benefits).

- the argument is different (symbol table index instead of a
   pointer to the relocation entry) so symbol lookup is different
   and there is no simple way to have common tlsdesc.c across
   different archs.

- _dl_tlsdesc_undefweak does not access the argument so it needs
   no synchronization.

The C code uses atomic_store_release for lazy initialization and
the asm uses DMB in the resolvers: every tls access will go
through an extra barrier (which must have a performance impact).

Tested on armv7-a.

2015-11-12  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	[BZ #18572]
	* sysdeps/arm/sysdep.h (DMB): Define.
	* sysdeps/arm/dl-tlsdesc.h (_dl_tlsdesc_return_lazy): Declare.
	* sysdeps/arm/dl-tlsdesc.S (_dl_tlsdesc_return_lazy): Define.
	(_dl_tlsdesc_dynamic): Guarantee TLSDESC entry and argument load-load
	ordering using DMB.
	* sysdeps/arm/tlsdesc.c (_dl_tlsdesc_lazy_resolver_fixup): Use relaxed
	atomics instead of volatile and synchronize using release store.
	(_dl_tlsdesc_resolve_hold_fixup): Use relaxed atomics instead of
	volatile.
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