[PATCH roland/arm] ARM: Fix memcpy & memmove for [ARM_ALWAYS_BX]

[Roland McGrath]

This was an oversight when I originally modified this code to handle the
ARM_ALWAYS_BX and ARM_BX_ALIGN_LOG2 > 2 cases.  I'm not sure how I managed
to miss it before.

This has no effect on existing (Linux) configurations.  I've tested the
fixed code on arm-nacl (under qemu) and after this there are no test suite
failures in string/ (before there were many).

OK?


Thanks,
Roland


2015-03-18  Roland McGrath  <roland@hack.frob.com>

	* sysdeps/arm/memcpy.S [ARM_ALWAYS_BX]: Fix computed-jump calculations
	to account for alignment padding.
	* sysdeps/arm/memmove.S: Likewise.

--- a/sysdeps/arm/memcpy.S
+++ b/sysdeps/arm/memcpy.S
@@ -125,7 +125,12 @@ ENTRY(memcpy)
 		push	{r10}
 		cfi_adjust_cfa_offset (4)
 		cfi_rel_offset (r10, 0)
-		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+0:		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		/* If alignment is not perfect, then there will be some
+		   padding (nop) instructions between this BX and label 6.
+		   The computation above assumed that two instructions
+		   later is exactly the right spot.  */
+		add	r10, #(6f - (0b + PC_OFS))
 		bx	r10
 #endif
 		.p2align ARM_BX_ALIGN_LOG2
@@ -156,11 +161,16 @@ ENTRY(memcpy)
 		add	pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
 		nop
 #else
-		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+0:		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		/* If alignment is not perfect, then there will be some
+		   padding (nop) instructions between this BX and label 6.
+		   The computation above assumed that two instructions
+		   later is exactly the right spot.  */
+		add	r10, #(66f - (0b + PC_OFS))
 		bx	r10
 #endif
 		.p2align ARM_BX_ALIGN_LOG2
-		nop
+66:		nop
 		.p2align ARM_BX_ALIGN_LOG2
 		sfi_breg r0, \
 		str	r3, [\B], #4
--- a/sysdeps/arm/memmove.S
+++ b/sysdeps/arm/memmove.S
@@ -141,7 +141,12 @@ ENTRY(memmove)
 		push	{r10}
 		cfi_adjust_cfa_offset (4)
 		cfi_rel_offset (r10, 0)
-		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+0:		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		/* If alignment is not perfect, then there will be some
+		   padding (nop) instructions between this BX and label 6.
+		   The computation above assumed that two instructions
+		   later is exactly the right spot.  */
+		add	r10, #(6f - (0b + PC_OFS))
 		bx	r10
 #endif
 		.p2align ARM_BX_ALIGN_LOG2
@@ -172,11 +177,16 @@ ENTRY(memmove)
 		add	pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
 		nop
 #else
-		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+0:		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		/* If alignment is not perfect, then there will be some
+		   padding (nop) instructions between this BX and label 6.
+		   The computation above assumed that two instructions
+		   later is exactly the right spot.  */
+		add	r10, #(66f - (0b + PC_OFS))
 		bx	r10
 #endif
 		.p2align ARM_BX_ALIGN_LOG2
-		nop
+66:		nop
 		.p2align ARM_BX_ALIGN_LOG2
 		sfi_breg r0, \
 		str	r3, [\B, #-4]!