[PATCH 01/27] S390: Fix handling of DXC-byte in FPC-register.

[Stefan Liebler]

On 06/26/2015 10:53 PM, Joseph Myers wrote:
> On Fri, 26 Jun 2015, Stefan Liebler wrote:
>
>> On s390, the DXC(data-exception-code)-byte in FPC(floating-point-control)-
>> register contains a code of the last occured exception.
>> If bits 6 and 7 of DXC-byte are zero, the bits 0-5 correspond to the
>> ieee-exception flag bits.
>> The current implementation always uses these bits as ieee-exception flag bits.
>> fetestexcept() reports any exception after the first usage of a
>> vector-instruction in a process, because it raises an "vector instruction
>> exception" with DXC-code 0xFE.
>> This patch fixes the handling of the DXC-byte. The DXC-Byte is only handled
>> if bits 6 and 7 are zero.
>
> Was this issue user-visible in existing releases (for user programs using
> vector instructions)?  If so, please file the usual bug in Bugzilla, put
> the [BZ #N] notation in the ChangeLog entry, add to NEWS and close the bug
> when committing.
>
Here is the bug: "Bug 18610 - S390: fetestexcept() reports any exception 
if DXC-code contains a vector instruction exception."
(https://sourceware.org/bugzilla/show_bug.cgi?id=18610)
and the new changelog. The patch remains the same as before.


ChangeLog:

	[BZ #18610]
	* sysdeps/s390/fpu/bits/fenv.h (fenv_t): Rename
	__ieee_instruction_pointer to __unused.
	* sysdeps/s390/fpu/fesetenv.c (__fesetenv): Remove usage of
	__ieee_instruction_pointer.
	* sysdeps/s390/fpu/fclrexcpt.c (feclearexcept):
	Fix dxc-field handling.
	* sysdeps/s390/fpu/fgetexcptflg.c (fegetexceptflag): Likewise.
	* sysdeps/s390/fpu/fsetexcptflg.c (fesetexceptflag): Likewise.
	* sysdeps/s390/fpu/ftestexcept.c (fetestexcept): Likewise.
	* sysdeps/s390/fpu/fpu_control.h (_FPU_RESERVED):
	Mark dxc-field as reserved.