[PATCH] Improve bndmov encoding with zero displacement

H.J. Lu hongjiu.lu@intel.com
Wed Jul 8 19:57:00 GMT 2015


If x86-64 assembler doesn't support MPX, we encode bndmov instruction by
hand.  When displacement is zero, assembler generates shorter encoding.
This patch improves bndmov encoding with zero displacement so that ld.so
is identical when using assemblers with and without MPX support.

Verified using assemblers with and without MPX support.  OK for trunk?

H.J.
--
	* sysdeps/x86_64/dl-trampoline.S (_dl_runtime_resolve): Improve
	bndmov encoding with zero displacement.
---
 sysdeps/x86_64/dl-trampoline.S | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sysdeps/x86_64/dl-trampoline.S b/sysdeps/x86_64/dl-trampoline.S
index b151d35..678c57f 100644
--- a/sysdeps/x86_64/dl-trampoline.S
+++ b/sysdeps/x86_64/dl-trampoline.S
@@ -80,7 +80,11 @@ _dl_runtime_resolve:
 	bndmov %bnd2, REGISTER_SAVE_BND2(%rsp)
 	bndmov %bnd3, REGISTER_SAVE_BND3(%rsp)
 # else
+#  if REGISTER_SAVE_BND0 == 0
+	.byte 0x66,0x0f,0x1b,0x04,0x24
+#  else
 	.byte 0x66,0x0f,0x1b,0x44,0x24,REGISTER_SAVE_BND0
+#  endif
 	.byte 0x66,0x0f,0x1b,0x4c,0x24,REGISTER_SAVE_BND1
 	.byte 0x66,0x0f,0x1b,0x54,0x24,REGISTER_SAVE_BND2
 	.byte 0x66,0x0f,0x1b,0x5c,0x24,REGISTER_SAVE_BND3
@@ -104,7 +108,11 @@ _dl_runtime_resolve:
 	.byte 0x66,0x0f,0x1a,0x5c,0x24,REGISTER_SAVE_BND3
 	.byte 0x66,0x0f,0x1a,0x54,0x24,REGISTER_SAVE_BND2
 	.byte 0x66,0x0f,0x1a,0x4c,0x24,REGISTER_SAVE_BND1
+#  if REGISTER_SAVE_BND0 == 0
+	.byte 0x66,0x0f,0x1a,0x04,0x24
+#  else
 	.byte 0x66,0x0f,0x1a,0x44,0x24,REGISTER_SAVE_BND0
+#  endif
 # endif
 #endif
 	# Get register content back.
-- 
2.4.3



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