[RFC PATCH] aarch64: improve memset

[Richard Henderson]

On 11/10/2014 09:09 PM, Wilco Dijkstra wrote:
> I spotted one issue in the alignment code:
> 
> +	stp	xzr, xzr, [tmp2, #64]
> +
> +	/* Store up to first SIZE, aligned 16.  */
> +.ifgt	\size - 64
> +	stp	xzr, xzr, [tmp2, #80]
> +	stp	xzr, xzr, [tmp2, #96]
> +	stp	xzr, xzr, [tmp2, #112]
> +	stp	xzr, xzr, [tmp2, #128]
> +.ifgt	\size - 128
> +.err
> +.endif
> +.endif
> 
> This should be:
> 
> +	/* Store up to first SIZE, aligned 16.  */
> +.ifgt	\size - 64
> +	stp	xzr, xzr, [tmp2, #64]
> +	stp	xzr, xzr, [tmp2, #80]
> +	stp	xzr, xzr, [tmp2, #96]
> +	stp	xzr, xzr, [tmp2, #112]
> +.ifgt	\size - 128
> +.err
> +.endif

Incorrect.

tmp2 is backward aligned from dst_in, which means that tmp2+0 may be before
dst_in.  Thus we write the first 16 bytes, unaligned, then write to tmp2+16
through tmp2+N to clear the first N+1 to N+16 bytes.

However, if we stop at tmp2+48 (or tmp2+112) we could be leaving up to 15 bytes
uninitialized.


r~