[Patch, MIPS] Modify __mpn routines for mips32r6/mips64r6

[Joseph Myers]

On Fri, 19 Dec 2014, Steve Ellcey  wrote:

> Support for mips32r6 and mips64r6 has been checked into GCC and binutils
> and there are a few changes needed for glibc as well.  Here is the first
> of the patches, it replaces the use of multu with mulu/muhu in the __mpn
> multi-precision math routines.  multu, which put the results in the high
> and low registers is not supported in mip32r6 and mips64r6 and has been
> replaced by mulu/muhu which put the high and low results into registers
> specified in the instruction.
> 
> Tested with the mips32r6/mips64r6 GCC, binutils and qemu simulator.
> 
> OK to checkin?

OK.  If the same code is present in current GMP (more generally, if GMP 
has MIPS assembler code affected by this issue) you'll want to submit the 
patch there as well.

-- 
Joseph S. Myers
joseph@codesourcery.com