[PATCH] PowerPC: stpcpy optimization for PPC64/POWER7

[Richard Henderson]

On 09/18/2013 12:00 PM, Adhemerval Zanella wrote:
> Well, your example SIGSEGVed in POWER7 system:

It runs just fine on gcc110.fsffrance.org,

processor       : 0
cpu             : POWER7 (architected), altivec supported
clock           : 3550.000000MHz
revision        : 2.1 (pvr 003f 0201)

> 
> $ gcc -O0 -g test.c -o test && gdb ./test
> (gdb) r
> Program received signal SIGSEGV, Segmentation fault.
> 0x00000000100005d8 in main () at test.c:13
> 13          asm("ld     %[rtmp], 0(%[rsrc])\n\t"
> (gdb) disas
> [...]
>    0x00000000100005cc <+60>:    cntlzd  r9,r9
>    0x00000000100005d0 <+64>:    rldicl  r9,r9,61,3
>    0x00000000100005d4 <+68>:    addi    r11,r9,-7
> => 0x00000000100005d8 <+72>:    ldx     r10,r11,r11

Hmm.  That's register clobbering there.  Gcc 4.7.2 generated

    10000654:   7d 08 00 74     cntlzd  r8,r8
    10000658:   79 08 e8 c2     rldicl  r8,r8,61,3
    1000065c:   38 e8 ff f9     addi    r7,r8,-7
    10000660:   7c ca 38 2a     ldx     r6,r10,r7
    10000664:   7c de 39 2a     stdx    r6,r30,r7

Ah, wrong constraints on my asm, that just so happened to work here.  Change
all "=r" to "=&r" so that ralt et al does not overlap rsrc.



r~