[PATCH] Don't use SSE4_2 instructions on Intel Silvermont Micro Architecture.

[Ondřej Bílka]

On Fri, Jun 21, 2013 at 03:07:30PM +0400, Dmitrieva Liubov wrote:
> I fixed the patch like H.J. suggested and attached results of micro
> benchmarks you requested.
>
> The functions which were impacted are rawmemchr, strchr, strrchr,
> strcmp, strcasecmp, strncmp, strncasecmp.
> I see just some small regressions on small lengths but huge gains on
> big lengths.
> 
I am OK with this case as asypmtotic gains here are worth a cost.
> Change Log.
> 
> 2013-06-19  Liubov Dmitrieva  <liubov.dmitrieva@intel.com>
> 
> * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
> Set bit_Slow_SSE4_2 for Intel Silvermont architecture.
> Set bit_Prefer_PMINUB_for_stringop for Intel Silvermont.
> * sysdeps/x86_64/multiarch/init-arch.h: Define
> bit_Slow_SSE4_2 and index_Slow_SSE4_2.
> Define index_Prefer_PMINUB_for_stringop which was undefined.
> * sysdeps/x86_64/multiarch/strchr.S: Use SSE2 version if
> bit_Slow_SSE4_2 is on.
> * sysdeps/x86_64/multiarch/strrchr.S: Use SSE2 version if
> bit_Slow_SSE4_2 is on.
> * sysdeps/x86_64/multiarch/strcmp.S: Use SSSE3 or SSE2 version if
> bit_Slow_SSE4_2 is on.
> 
> 
> --
> Liubov