[PATCH 1/2] Append AVX2 instruction detection

[Richard Henderson]

On 06/05/2013 02:22 AM, ling.ma.program@gmail.com wrote:
> +    /* __cpuid in standard header has bug on cpuid index 0x7,
> +         we use ourself version. */
> +    eax = 7;
> +    ecx = 0;
> +    asm volatile("cpuid"
> +		     : "+a" (eax), "=b" (ebx), "=d" (edx), "+c" (ecx));

__cpuid is not "broken"; you should use __cpuid_count when ecx input is required.

> +	      /* Haswell or above platform should have index 7 feature */
> +	      if (model >= 0x3c) {
> +		    get_indeces_7();
> +		    if (HAS_AVX2)
> +			__cpu_features.feature[index_AVX2_Usable] |= bit_AVX2_Usable;
> +	      }

Don't trigger this on model; __cpu_features.max_cpuid tells you whether index 7
is usable.  Indeed, this entire patch appears to be redundant with

  if (__cpu_features.max_cpuid >= 7)
    __cpuid_count (7, 0,
                   __cpu_features.cpuid[COMMON_CPUID_INDEX_7].eax,
                   __cpu_features.cpuid[COMMON_CPUID_INDEX_7].ebx,
                   __cpu_features.cpuid[COMMON_CPUID_INDEX_7].ecx,
                   __cpu_features.cpuid[COMMON_CPUID_INDEX_7].edx);

already present in this bit of code.


r~