[PATCH RFC V4] Improve 64bit memcpy/memove for Corei7 with unaligned avx instruction

[Ondřej Bílka]

On Mon, Jul 29, 2013 at 11:52:55AM +0200, Andreas Jaeger wrote:
> On 07/29/2013 11:40 AM, ling.ma.program@gmail.com wrote:
> > From: Ma Ling <ling.ml@alibaba-inc.com>
> > 
> > We manage to avoid branch instructions, and force destination to be aligned
> > with avx instruction, then modified gcc.403 so that we can only measure memcpy function, 
> > gcc.403 benchmarks indicate the version improved performance from 4% to 14%
> > cmpaired with memcpy_sse2_unaligned on haswell machine.
> > 
> > case	avx_unaligned	sse2_unaligned	AVX vs SSE2
> > 200i	146833745		168384142	1.146767332
> > g23		1431207341		1557405243	1.088175835
> > 166i	350901531		379068674	1.08027079
> > cp-decl	370750774		395890196	1.067806796
> > c-type	763780824		810806468	1.061569553
> > expr2	986698539		1067232192	1.081619309
> > expr	727016829		758953883	1.043928906
> > s04		1117900758		1185159528	1.060165242
> > scilab	63309111		66893431	1.05661618
> > (We will send test patch on memcpy for above cases)
> 
> Is memcpy_sse2_unaligned really the right function to compare with?
> Isn't __memcpy_ssse3 used on Haswell today?
>
It should be correct one unless ifunc selection was wrong. Does
haswell have bit_Slow_BSF bit set?
> Andreas
> -- 
>  Andreas Jaeger aj@{suse.com,opensuse.org} Twitter/Identica: jaegerandi
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