[PATCH RFC V2] Improve 64bit memcpy/memove for Corei7 with unaligned avx instruction

[Ling Ma]

> Wait doing prefetching memory at read and having nontemporal stores?
> These aims are contradictory and if you want best memcpy performance
> do not use nontemporal store and when we do not want to trash cache we
> do not use prefetch and load use nontemporal loads.
>
> Also following code does not use avx. Is it intentional or could it
> improve performance?
Ling:  We use non-temporary store to avoid read-for-ownership,
write-back memory page asks us to read data from memory first ,  then
combine it with latest modification, at last  write cacheline into L1
cache if data was not in L1 cache. we use non-temporary instruction to
combine data into one cache line and directly write it into memory, it
helps us to avoid redundant operation. We have to read source data so
introduce prefetch instruction, our results shows prefetchnta is
better for us, we will replace prefecht0 with it in next version.
Thanks Ondra!