[PATCH 03/15] Add HAS_RTM

[Andreas Jaeger]

On 01/03/2013 06:06 PM, H.J. Lu wrote:
> On Thu, Jan 3, 2013 at 7:29 AM, Andreas Jaeger <aj@suse.com> wrote:
>> On 12/23/2012 04:02 AM, Andi Kleen wrote:
>>>
>>> From: "H.J. Lu" <hjl.tools@gmail.com>
>>>
>>> Add cpuid bits for RTM (Restricted Transactional Memory) and code
>>> to query cpuid 7.
>>> ---
>>>    ChangeLog.tsx                        |    9 +++++++++
>>>    sysdeps/x86_64/multiarch/init-arch.c |    7 +++++++
>>>    sysdeps/x86_64/multiarch/init-arch.h |   10 ++++++++++
>>>    3 files changed, 26 insertions(+), 0 deletions(-)
>>>    create mode 100644 ChangeLog.tsx
>>>
>>> diff --git a/ChangeLog.tsx b/ChangeLog.tsx
>>> new file mode 100644
>>> index 0000000..392b444
>>> --- /dev/null
>>> +++ b/ChangeLog.tsx
>>> @@ -0,0 +1,9 @@
>>> +2012-12-11  H.J. Lu  <hongjiu.lu@intel.com>
>>> +
>>> +       * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
>>> +       Initialize COMMON_CPUID_INDEX_7 element.
>>> +       * sysdeps/x86_64/multiarch/init-arch.h (bit_RTM): New macro.
>>> +       (index_RTM): Likewise.
>>> +       (CPUID_RTM): Likewise.
>>> +       (HAS_RTM): Likewise.
>>> +       (COMMON_CPUID_INDEX_7): New enum.
>>> diff --git a/sysdeps/x86_64/multiarch/init-arch.c
>>> b/sysdeps/x86_64/multiarch/init-arch.c
>>> index 71a862c..d38878a 100644
>>> --- a/sysdeps/x86_64/multiarch/init-arch.c
>>> +++ b/sysdeps/x86_64/multiarch/init-arch.c
>>> @@ -143,6 +143,13 @@ __init_cpu_features (void)
>>>      else
>>>        kind = arch_kind_other;
>>>
>>> +  if (__cpu_features.max_cpuid >= 7)
>>> +    __cpuid_count (7, 0,
>>> +                  __cpu_features.cpuid[COMMON_CPUID_INDEX_7].eax,
>>> +                  __cpu_features.cpuid[COMMON_CPUID_INDEX_7].ebx,
>>> +                  __cpu_features.cpuid[COMMON_CPUID_INDEX_7].ecx,
>>> +                  __cpu_features.cpuid[COMMON_CPUID_INDEX_7].edx);
>>> +
>>>      /* Can we call xgetbv?  */
>>>      if (CPUID_OSXSAVE)
>>>        {
>>> diff --git a/sysdeps/x86_64/multiarch/init-arch.h
>>> b/sysdeps/x86_64/multiarch/init-arch.h
>>> index 79ff1fe..9ae2a9c 100644
>>> --- a/sysdeps/x86_64/multiarch/init-arch.h
>>> +++ b/sysdeps/x86_64/multiarch/init-arch.h
>>> @@ -26,6 +26,8 @@
>>>    #define bit_FMA4_Usable                       (1 << 8)
>>>
>>>    /* CPUID Feature flags.  */
>>> +
>>> +/* COMMON_CPUID_INDEX_1.  */
>>>    #define bit_SSE2      (1 << 26)
>>>    #define bit_SSSE3     (1 << 9)
>>>    #define bit_SSE4_1    (1 << 19)
>>> @@ -36,6 +38,9 @@
>>>    #define bit_FMA               (1 << 12)
>>>    #define bit_FMA4      (1 << 16)
>>>
>>> +/* COMMON_CPUID_INDEX_7.  */
>>> +#define bit_RTM                (1 << 11)
>>> +
>>>    /* XCR0 Feature flags.  */
>>>    #define bit_XMM_state  (1 << 1)
>>>    #define bit_YMM_state  (2 << 1)
>>> @@ -49,6 +54,7 @@
>>>    # define index_SSE4_1 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
>>>    # define index_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
>>>    # define index_AVX    COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
>>> +# define index_RTM     COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_ECX_OFFSET
>>
>>
>> Should this really be ECX? Below you're using ebx.
>>
>
> index_RTM wasn't used.  Here is the updated patch which removes it.
> This is tested on Haswell.


this version is fine, thanks,

Andreas
-- 
  Andreas Jaeger aj@{suse.com,opensuse.org} Twitter/Identica: jaegerandi
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