[PATCH 19/21] PowerPC: multiarch wordcopy support for PPC64

[Adhemerval Zanella]

On 11-12-2013 00:46, Steven Munroe wrote:
>
> @@ -329,11 +332,12 @@ _wordcopy_bwd_aligned (dstp, srcp, len)
>     words (not LEN bytes!).  DSTP should be aligned for memory
>     operations on `op_t', but SRCP must *not* be aligned.  */
>
> +#ifndef WORDCOPY_BWD_DEST_ALIGNED
> +# define WORDCOPY_BWD_DEST_ALIGNED _wordcopy_bwd_dest_aligned
> +#endif
> +
>  void
> -_wordcopy_bwd_dest_aligned (dstp, srcp, len)
> -     long int dstp;
> -     long int srcp;
> -     size_t len;
> +WORDCOPY_BWD_DEST_ALIGNED (long int dstp, long int srcp, size_t len)
>  {
>    op_t a0, a1, a2, a3;
>    int sh_1, sh_2;
> Expected to see these macros defined for power6/power7 somewhere in this
> patch, but I don't see that. Where does this happen?

They are in fact in the files included by sysdeps/powerpc/powerpc64/multiarch/wordcopy-power[6/7].c;

$ cat sysdeps/powerpc/powerpc64/multiarch/wordcopy-power6.c | grep include
#include <sysdeps/powerpc/powerpc32/power4/multiarch/wordcopy-power6.c>
$ cat sysdeps/powerpc/powerpc32/power4/multiarch/wordcopy-power6.c | grep _wordcopy_
#define WORDCOPY_FWD_ALIGNED      _wordcopy_fwd_aligned_power6
#define WORDCOPY_FWD_DEST_ALIGNED _wordcopy_fwd_dest_aligned_power6
#define WORDCOPY_BWD_ALIGNED      _wordcopy_bwd_aligned_power6
#define WORDCOPY_BWD_DEST_ALIGNED _wordcopy_bwd_dest_aligned_power6