Not supporting all rounding modes (was: [PATCH 1/4 v3] [SH/SH4]: Add support fedisableexcept, feenableexcept, fegetexcept and feupdateenv)

[Thomas Schwinge]

Hi!

On Fri, 18 May 2012 12:54:29 +0200, I wrote:
> math/test-float.out:
> 
> [old] The rint_downward, rint_upward, lrint_downward, lrint_upward,
> llrint_downward, llrint_upward functions round towards the wrong end.

Well, that one is "simple" enough -- once you get the idea...

The SH-4A Software Manual as well as the SH7785 Hardware Manual say in
»6.3.2 Floating-Point Status/Control Register (FPSCR)«:

    Bit | Bit Name | Initial | R/W | Description
        |          | Value   |     |
    [...]
      1 |      RM1 |       0 | R/W | Rounding Mode
      0 |      RM0 |       1 | R/W | These bits select the rounding mode.
                                   | 00: Round to Nearest
                                   | 01: Round to Zero
                                   | 10: Reserved
                                   | 11: Reserved

On the other hand, sysdeps/sh/sh4/fpu/bits/fenv.h proclaims:

    /* The SH FPU supports all of the four defined rounding modes.  We
       use again the bit positions in the FPU control word as the values
       for the appropriate macros.  */
    enum
      {
        FE_TONEAREST = 0x0,
    #define FE_TONEAREST	FE_TONEAREST
        FE_TOWARDZERO = 0x1,
    #define FE_TOWARDZERO	FE_TOWARDZERO
        FE_UPWARD = 0x2,
    #define FE_UPWARD	FE_UPWARD
        FE_DOWNWARD = 0x3
    #define FE_DOWNWARD	FE_DOWNWARD
      };

As far as I can tell, glibc is currently prepared to handle either no
rounding modes, or all four -- but SH-4A apparently only supports two.
Or am I missing some information?


Using the following hack to continue advertizing FE_UPWARD and
FE_DOWNWARD, but refusing them at fesetround time, at least the math
testsuite looks more sane.  But that doesn't really make itself out to be
a proper solution...  Comments?

Index: sysdeps/sh/sh4/fpu/fesetround.c
===================================================================
--- sysdeps/sh/sh4/fpu/fesetround.c	(revision 18520)
+++ sysdeps/sh/sh4/fpu/fesetround.c	(working copy)
@@ -23,9 +23,14 @@
 {
   fpu_control_t cw;
 
+#if 0
   if ((round & ~0x3) != 0)
+#else
+  if (round != FE_TONEAREST
+      && round != FE_TOWARDZERO)
+#endif
     /* ROUND is no valid rounding mode.  */
     return 1;
 


Grüße,
 Thomas
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