[PATCH 2/2] PowerPC - Add a faster way to read the Time Base register
Ryan S. Arnold
ryan.arnold@gmail.com
Thu Apr 5 16:39:00 GMT 2012
On Wed, Apr 4, 2012 at 3:41 PM, Tulio Magno Quites Machado Filho
<tuliom@linux.vnet.ibm.com> wrote:
> diff --git a/sysdeps/powerpc/sys/platform/ppc.h b/sysdeps/powerpc/sys/platform/ppc.h
> index b4bf7c8..cdfcba5 100644
> --- a/sysdeps/powerpc/sys/platform/ppc.h
> +++ b/sysdeps/powerpc/sys/platform/ppc.h
> @@ -19,5 +19,40 @@
>
> #define _SYS_PLATFORM_PPC_H 1
>
> +typedef unsigned long long int __ppc_timebase;
> +
> +/* Read the Time Base Register
> + The Time Base Register is a 64-bit register that stores a monotonically
> + incremented value updated at a system dependent frequency that may be
> + different of processor frequency.
> + More information in Power ISA 2.06b - Book II - Section 5.2 */
> +#ifdef __powerpc64__
> +static inline __ppc_timebase
> +__ppc_get_timebase (void)
> +{
> + __ppc_timebase __tb;
> + __asm__ volatile (
> + "mfspr %0, 268\n"
> + : "=r" (__tb)
> + : );
> + return __tb;
> +}
> +#else /* not __powerpc64__ */
> +static inline __ppc_timebase
> +__ppc_get_timebase (void)
> +{
> + register unsigned long __tbu, __tbl, __tmp; \
> + __asm__ volatile (
> + "0:\n"
> + "mftbu %0\n"
> + "mftbl %1\n"
> + "mftbu %2\n"
> + "cmpw %0, %2\n"
> + "bne- 0b\n"
> + : "=r" (__tbu), "=r" (__tbl), "=r" (__tmp)
> + : );
> + return (( (__ppc_timebase) __tbu << 32) | __tbl);
> +}
> +#endif /* not __powerpc64__ */
>
> #endif /* sys/platform/ppc.h */
Per Roland's response to [PATCH 1/2], merge this with the creation of
ppc.h, thus creating ppc.h and adding these inline functions at the
same time.
And, I think that ppc.h should be added to this patchset [PATCH 2/2]
rather than [PATCH 1/2].
Ryan
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