glibc: loading of shared objects with holes wastes address space

Mathias Krause minipli@googlemail.com
Wed Oct 19 15:49:00 GMT 2011


On Tue, Oct 18, 2011 at 5:55 PM, Ian Lance Taylor <iant@google.com> wrote:
> Mathias Krause <minipli@googlemail.com> writes:
>> Are there _any_ plans from Intel/AMD (or rumors, even) to drop the
>> page size support for 4 KiB pages in a future x86-64 based
>> architecture? At least, I'm not aware of such a thing. So this can not
>> really be an argument for choosing 2 MiB for ELF segment alignment.
>
> It's not the processor that matters here, it's the kernel.  The question
> is whether the kernel will want to some day require executables to use a
> larger page size.

As long, as the kernel has support for 32 bit Intel CPUs, this will
not happen. So, why bother?

Regards,
Mathias



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