[PATCH] PowerPC64 - Disable VSX usage in rtld.c to prevent TOC ref before relocs are resolved.
Ryan Arnold
rsa@us.ibm.com
Tue Feb 15 21:10:00 GMT 2011
When GLIBC is compiled -O3 --with-cpu=power7 the compiler gets too
clever and attempts to use a VSX register to clear 128 bits at a time in
a loop optimization. You need a TOC load when you deal with constants
that the compiler can't create without a load. So a relocation against
the TOC was generated when the compiler optimization needed a 0.0
constant but at this point in _dl_start we can't access variables that
need relocations.
A GCC fix to generate 0.0 directly into a VSX register rather than
having to load it has been checked into GCC trunk but this won't prevent
the use of non-zero constants in the future. To be safe this patch
disables VSX register and instruction usage in _dl_start by passing
-mno-vsx when building rtld.c.
Ryan S. Arnold
IBM Linux Technology Center
2011-02-15 Ryan S. Arnold <rsa@us.ibm.com>
* sysdeps/powerpc/powerpc64/power7/Makefile: New file which adds
-mno-vsx to the CFLAGS-rtld.c variable to avoid using VSX registers and
insns in _dl_start to prevent a TOC reference before relocs are
resolved.
diff --git a/sysdeps/powerpc/powerpc64/power7/Makefile b/sysdeps/powerpc/powerpc64/power7/Makefile
new file mode 100644
index 0000000..54b0fd9
--- /dev/null
+++ b/sysdeps/powerpc/powerpc64/power7/Makefile
@@ -0,0 +1,5 @@
+ifeq ($(subdir),elf)
+# Prevent the use of VSX registers and insns in _dl_start, which under -O3
+# optimization may require a TOC reference before relocations are resolved.
+CFLAGS-rtld.c = -mno-vsx
+endif
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