[PATCH] Native POSIX Thread Library(NPTL) ARM Supporting Patches (1/3)

[Philip Blundell]

On Thu, 2003-05-29 at 16:54, Daniel Jacobowitz wrote:
> On Thu, May 29, 2003 at 03:28:35PM +0100, Philip Blundell wrote:
> > On Thu, 2003-05-29 at 15:21, Jakub Jelinek wrote:
> > > If ARMs are never going to be SMP, this seems like good idea
> > > if there are no spare registers.
> > 
> > Yep, there are indeed no spare registers.  
> > 
> > Right now, there are no SMP ARM systems.  We might see some in the
> > future, but there is always the option of locking down a line in the
> > d-cache for use as CPU-local scratchpad memory.  I guess if that's a
> > possibility, it might be better for the kernel to pick the address of
> > the thread ID variable.
> 
> I suspect that having the system call wouldn't be a total performance
> killer; how many cycles is e.g. getuid() on ARM?

Couple of hundred, maybe?  I think it comes out at about 400ns on a
netwinder.

p.