[PATCH] PPC atomic cleanup

[Steve Munroe]

Geoffrey Keating <geoffk@geoffk.org> writes:

> Steven Munroe <sjmunroe@us.ibm.com> writes:
>
> >  #define atomic_write_barrier()     __asm ("eieio" ::: "memory")
>
> This wasn't changed by your patch, but it's surely wrong, 
> eieio only applies to I/O segments.

eieio applies to both I/O and RAM segments. 

"It acts like a barrier that flows through the storage queues and to main 
storage, preventing the reordering of storage accesses across the 
barrier.", page 334 of "The PowerPC Architecture"

For RAM accesses, eieio does not enforce order between stores only. As 
such eieio is "faster" (fewer machine cycles) than sync which will 
"synchronize storage with respect to all processors and mechanism".