[PATCH] PPC atomic.h PPC64 fixes

Steven Munroe sjmunroe@us.ibm.com
Thu Mar 27 23:37:00 GMT 2003


The current sysdeps/powerpc/bits/atomic.h fails csu/tst-atomic.c and 
tst-atomic-long.c for PPC64.

For tst-atomic (sizeof(mem) == 4) the 
__arch_compare_and_exchange_bool_32_acq macro must sign extend the 
register loaded lwarx (mem) before the subtract from. In PPC64 most 
register to register ops are 64-bit even for (32-bit) int. In this case 
oldval was sign extend to 64-bit but lwarx is zero extended. So the 
extend sign word is required.

The __arch_atomic_exchange_and_add_64 macro was causing constraint match 
warnings because a int variable was being passed to I const constraint. 
Change the addi to add and changed the constraint to "r".

Finally is a good idea to use the "b" constraint for "base registers".

For tst-atomic-long (sizeof(mem) == 8) the atomic_decrement_if_positive 
macro was not defined for.



2003-03-27  Steven Munroe <sjmunroe@us.ibm.com>

	* sysdeps/powerpc/bits/atomic.h
	(__arch_compare_and_exchange_bool_32_acq): Move to
	[!__powerpc64__]
	[__powerpc64__] (__arch_compare_and_exchange_bool_32_acq):
	Define PPC64 specific version.
	[__powerpc64__] (__arch_compare_and_exchange_bool_64_acq):
	Change (mem) constraint to "b".
	[__powerpc64__] (__arch_atomic_exchange_and add_64):
	Replace addi with add. Change (value) contraint to "r".
	Change (mem) constraint to "b".
	[__powerpc64__] (__arch_atomic_decrement_if_positive_64):
	New macro.
	(__arch_atomic_exchange_32): Change (mem) constraint to "b".
	(__arch_atomic_exchange_and_add_32): Change (mem) constraint
	to "b".
	(__arch_atomic_decrement_if_positive_32): New macro.
	(atomic_decrement_if_positive): Use __arch* macros.

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