An ia32 LOCK/XADD bug.

[Ulrich Drepper]

"H . J . Lu" <hjl@lucon.org> writes:

> is an illegal instruction on ia32.  I cannot find anything in Intel
> reference manual to say you cannot have LOCK on insn where DST/SRC are
> reg or same. My questions are

It is definitely illegal.  The lock prefix works on the part of the
processor which handles memory access.

The problem I have is to see where you actually find this code in glibc.

> 1. How to write a correct exchange_and_add? Is exchange_and_add_1 ok?

This is exactly what we do in sysdeps/i386/i486/atomicity.h.

> 2. If "lock xadd %edx,%edx" is really an illegal instruction on ia32,
> how should we fix gas to detect that?

Some IA-32 specific code has to check that an instruction with a lock
prefix always has a memory operand.  Don't know where to insert this.

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