GNU C Library master sources branch master updated. glibc-2.17-486-g60c414c
azanella@sourceware.org
azanella@sourceware.org
Mon Apr 1 11:50:00 GMT 2013
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http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=60c414c346a1d5ef0510ffbdc0ab75f288ee4d3f
commit 60c414c346a1d5ef0510ffbdc0ab75f288ee4d3f
Author: Adhemerval Zanella <azanella@linux.vnet.ibm.com>
Date: Fri Mar 29 18:15:28 2013 -0500
PowerPC: remove branch prediction from rint implementation
The branch prediction hints is actually hurts performance in this case.
The assembly implementation make two assumptions: 1. 'fabs (x) < 2^52'
is unlikely and 2. 'x > 0.0' is unlike (if 1. is true). Since it a
general floating point function, expected input is not bounded and then
it is better to let the hardware handle the branches.
diff --git a/benchtests/Makefile b/benchtests/Makefile
index 74938b9..cc54b81 100644
--- a/benchtests/Makefile
+++ b/benchtests/Makefile
@@ -43,7 +43,7 @@
# See pow-inputs for an example.
subdir := benchtests
-bench := exp pow
+bench := exp pow rint
exp-ITER = 100000
exp-ARGLIST = double
@@ -55,5 +55,10 @@ pow-ARGLIST = double:double
pow-RET = double
LDFLAGS-bench-pow = -lm
+rint-ITER = 250000000
+rint-ARGLIST = double
+rint-RET = double
+LDFLAGS-bench-rint = -lm
+
include ../Makeconfig
include ../Rules
diff --git a/benchtests/rint-inputs b/benchtests/rint-inputs
new file mode 100644
index 0000000..a5f83dc
--- /dev/null
+++ b/benchtests/rint-inputs
@@ -0,0 +1,4 @@
+78.5
+-78.5
+4503599627370497.0
+-4503599627370497.0
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_rint.S b/sysdeps/powerpc/powerpc32/fpu/s_rint.S
index f3cd036..f04055f 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_rint.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_rint.S
@@ -45,14 +45,14 @@ ENTRY (__rint)
fsub fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
- bng- cr6,.L4
+ bnllr cr7
+ bng cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */
fsub fp1,fp1,fp13 /* x-= TWO52; */
fabs fp1,fp1 /* if (x == 0.0) */
blr /* x = 0.0; */
.L4:
- bnllr- cr6 /* if (x < 0.0) */
+ bnllr cr6 /* if (x < 0.0) */
fsub fp1,fp1,fp13 /* x-= TWO52; */
fadd fp1,fp1,fp13 /* x+= TWO52; */
fnabs fp1,fp1 /* if (x == 0.0) */
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_rintf.S b/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
index 247dd4a..e0301af 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_rintf.S
@@ -41,14 +41,14 @@ ENTRY (__rintf)
fsubs fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
- bng- cr6,.L4
+ bnllr cr7
+ bng cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */
fsubs fp1,fp1,fp13 /* x-= TWO23; */
fabs fp1,fp1 /* if (x == 0.0) */
blr /* x = 0.0; */
.L4:
- bnllr- cr6 /* if (x < 0.0) */
+ bnllr cr6 /* if (x < 0.0) */
fsubs fp1,fp1,fp13 /* x-= TWO23; */
fadds fp1,fp1,fp13 /* x+= TWO23; */
fnabs fp1,fp1 /* if (x == 0.0) */
diff --git a/sysdeps/powerpc/powerpc64/fpu/s_rint.S b/sysdeps/powerpc/powerpc64/fpu/s_rint.S
index f333972..57e3759 100644
--- a/sysdeps/powerpc/powerpc64/fpu/s_rint.S
+++ b/sysdeps/powerpc/powerpc64/fpu/s_rint.S
@@ -34,14 +34,14 @@ EALIGN (__rint, 4, 0)
fsub fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
- bng- cr6,.L4
+ bnllr cr7
+ bng cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */
fsub fp1,fp1,fp13 /* x-= TWO52; */
fabs fp1,fp1 /* if (x == 0.0) */
blr /* x = 0.0; */
.L4:
- bnllr- cr6 /* if (x < 0.0) */
+ bnllr cr6 /* if (x < 0.0) */
fsub fp1,fp1,fp13 /* x-= TWO52; */
fadd fp1,fp1,fp13 /* x+= TWO52; */
fnabs fp1,fp1 /* if (x == 0.0) */
diff --git a/sysdeps/powerpc/powerpc64/fpu/s_rintf.S b/sysdeps/powerpc/powerpc64/fpu/s_rintf.S
index 26b0872..cb28ec7 100644
--- a/sysdeps/powerpc/powerpc64/fpu/s_rintf.S
+++ b/sysdeps/powerpc/powerpc64/fpu/s_rintf.S
@@ -30,14 +30,14 @@ EALIGN (__rintf, 4, 0)
fsubs fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
- bnllr- cr7
- bng- cr6,.L4
+ bnllr cr7
+ bng cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */
fsubs fp1,fp1,fp13 /* x-= TWO23; */
fabs fp1,fp1 /* if (x == 0.0) */
blr /* x = 0.0; */
.L4:
- bnllr- cr6 /* if (x < 0.0) */
+ bnllr cr6 /* if (x < 0.0) */
fsubs fp1,fp1,fp13 /* x-= TWO23; */
fadds fp1,fp1,fp13 /* x+= TWO23; */
fnabs fp1,fp1 /* if (x == 0.0) */
-----------------------------------------------------------------------
Summary of changes:
benchtests/Makefile | 7 ++++++-
benchtests/rint-inputs | 4 ++++
sysdeps/powerpc/powerpc32/fpu/s_rint.S | 6 +++---
sysdeps/powerpc/powerpc32/fpu/s_rintf.S | 6 +++---
sysdeps/powerpc/powerpc64/fpu/s_rint.S | 6 +++---
sysdeps/powerpc/powerpc64/fpu/s_rintf.S | 6 +++---
6 files changed, 22 insertions(+), 13 deletions(-)
create mode 100644 benchtests/rint-inputs
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