[Bug libc/17403] atomic_full_barrier is incorrect for x86 and x86_64

[bugdal at aerifal dot cx]

https://sourceware.org/bugzilla/show_bug.cgi?id=17403

Rich Felker <bugdal at aerifal dot cx> changed:

           What    |Removed                     |Added
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                 CC|                            |bugdal at aerifal dot cx

--- Comment #1 from Rich Felker <bugdal at aerifal dot cx> ---
This could use some explanation as to why you think it's wrong. In the original
x86 memory model, there is absolutely no need for memory barriers (though
compiler barriers are of course needed). My understanding is that there are
some newer instructions available which can optionally relax memory ordering,
but it's not clear to me if they would be used by the compiler in any way that
would necessitate having mfence or similar instructions alongside atomics. If
so, I believe this is an ABI incompatibility issue, since the atomics in use
may be built for i486 (where they don't have access to any explicit barrier
instruction). So from that standpoint some clarification is really needed to
determine if we have a bigger problem on our hands...

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