[Bug math/5768] New: isnan() will throw SIGFPE with signalling NaN

[sjmunroe at us dot ibm dot com]

On powerpc the default implementation uses:


  savedstate = fegetenv_register ();
  reset_fpscr_bit (FPSCR_VE);
  result = !(x == x);
  fesetenv_register (savedstate);
  return result;

But with GCC-4.1+ there is no dependency to prevent GCC from moving the
fesetenv_register() [mtfsf] ahead of the (x==x) [fcmpu f1,f1]. In the default
mode this is not a problem. but if FE_INVALID is enabled and a signaling NaN is
passed to isnan() we will get a SIGFPE.

-- 
           Summary: isnan() will throw SIGFPE with signalling NaN
           Product: glibc
           Version: unspecified
            Status: NEW
          Severity: normal
          Priority: P3
         Component: math
        AssignedTo: aj at suse dot de
        ReportedBy: sjmunroe at us dot ibm dot com
                CC: glibc-bugs at sources dot redhat dot com
 GCC build triplet: powerpc64-*-linux
  GCC host triplet: powerpc64-*-linux
GCC target triplet: powerpc64-*-linux and powerpc-*-linux


http://sourceware.org/bugzilla/show_bug.cgi?id=5768

------- You are receiving this mail because: -------
You are on the CC list for the bug, or are watching someone who is.