gdb support for SME-without-SVE ?

[Andrew Pinski]

On Tue, Jan 27, 2026 at 3:33 AM Peter Maydell via Gdb
<gdb@sourceware.org> wrote:
>
> Hi: is GDB for Arm intended to support configurations where the target
> CPU has SME but not SVE?
>
> We're just implementing support for that in QEMU for using SME
> with the hvf hypervisor accelerator on macos systems, but when
> we tried connecting gdb to QEMU gdb crashed:
>
>   (gdb) target remote localhost:1234
>   Remote debugging using localhost:1234
>   ../../gdb/aarch64-tdep.c:3068: internal-error:
> aarch64_pseudo_register_type: bad register number 160
>   A problem internal to GDB has been detected,
>   further debugging may prove unreliable.
>   Fatal signal: Abort trap: 6
>
> https://lore.kernel.org/qemu-devel/CAAjaMXZLG2aBtStRhyvmdENj1Z+Mx05BmDgyYUoYrc_ZnHwyVQ@mail.gmail.com/
>
> Is this a known missing feature in GDB, or is it a config that's
> supposed to work but we've got the XML register description wrong
> somehow?
>
> It looks from the aarch64-tdep.c code like perhaps GDB assumes
> that the Vn vector registers only exist with SVE, but they also
> exist in SME-only CPUs.

I think the support is not there yet because at one point
(non-streaming) SVE was a requirement for SME at least for software
(it was also the recommended way from Arm too) but things changed when
Apple decided to implement their cores without (non-streaming) SVE.
GCC support for this is in review
(https://patchwork.sourceware.org/project/gcc/list/?series=56024). I
don't know if the Arm folks have started work on supporting this for
gdb yet.
Also I don't think GCC support will be included until GCC 17 either.

Thanks,
Andrew Pinski

>
> thanks
> -- PMM