aarch64-tdep.c:379: internal-error: CORE_ADDR aarch64_analyze_prologue(gdbarch*, CORE_ADDR, CORE_ADDR, aarch64_prologue_cache*, {anonymous}::abstract_instruction_reader&): Assertion `inst.operands[0].qualifier == AARCH64_OPND_QLF_S_D' failed

Dmitry Antipov dantipov@nvidia.com
Mon Apr 2 09:13:00 GMT 2018


IIUC a few types of STP and STR instructions are explicitly banned in aarch64_analyze_prologue():

f:
         stp     x29, x30, [sp, #-160]!
         mov     x29, sp
         stp     q0, q1, [sp, #-16]!     ; Hmm...
         ldp     x29, x30, [sp], #160
         ret
.end

The following dummy self-test...

diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index f08945ea07..42f9d00b64 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -529,6 +529,22 @@ aarch64_analyze_prologue_test (void)
    struct gdbarch *gdbarch = gdbarch_find_by_info (info);
    SELF_CHECK (gdbarch != NULL);

+  {
+    struct aarch64_prologue_cache cache;
+    cache.saved_regs = trad_frame_alloc_saved_regs (gdbarch);
+
+    static const uint32_t insns[] = {
+      0xa9b67bfd, /* stp       x29, x30, [sp, #-160]! */
+      0x910003fd, /* mov       x29, sp */
+      0xadbf87e0, /* stp       q0, q1, [sp, #-16]! */
+      0xa8ca7bfd, /* ldp       x29, x30, [sp], #160 */
+      0xd65f03c0  /* ret */
+    };
+
+    instruction_reader_test reader (insns);
+    (void)aarch64_analyze_prologue (gdbarch, 0, 128, &cache, reader);
+  }
+

...raises gdb_assert():

(gdb) maintenance selftest
Running selftest aarch64-analyze-prologue.
../../gdb/aarch64-tdep.c:379: internal-error: CORE_ADDR aarch64_analyze_prologue(gdbarch*, CORE_ADDR, CORE_ADDR, aarch64_prologue_cache*, {anonymous}::abstract_instruction_reader&): Assertion 
`inst.operands[0].qualifier == AARCH64_OPND_QLF_S_D' failed.

Can someone please explain why it is so?

Dmitry



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