gdb won't single-step over ARM integer divide opcode

Yao Qi
Sun Aug 9 11:39:00 GMT 2015

On 05/08/15 19:02, John Breitenbach wrote:
> I did some debugging and have found that the function,
> arm_get_next_pc_raw, inappropriately decodes this opcode as a load into
> the PC register.  (bits 24..27 are 7, bit 20 is set, and the dest
> register appears to be the PC.
> Binutils's logic to disassemble the sdiv/udiv opcodes has opcode &
> 0x0ff0f0f0 = 0x0710f010 (with bit 21 distinguishing between udiv and sdiv)
> I've come up with the following patch which makes my situation work. But
> I don't know how complete it is, as there may be other newer opcodes
> which fall into the formerly undefined instruction space.

Hi John,
Thanks for your patch, however, I think I've fixed this problem in
Does it work for you?  This commit will be in 7.10 release.

> Also, the comment "byte write to PC" around line 4930 seems wrong, as
> the check for bit 22 a few lines earlier catches that situation, and
> what's left is word writes to the PC."

Yeah, it is possible.  Patch is welcome :)

Yao (齐尧)

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